Dr. Yash Agrawal received his Ph.D. and M.Tech. Degrees in VLSI Design Automation and Techniques in E&CE Department from National Institute of Technology, Hamirpur, Himachal Pradesh, India.
Dr. Yash has been expert and distinguished guest at various places. He is Editor and Reviewer of several reputed Journals. He has been Secretary and Coordiantor of various forums and events. He has organized several workshops and part of the organizing committee in various Trainings, Seminars, and Conferences. He has been the Chairman and awarded with best forum member of IETE Forum at KITS Ramtek, Nagpur Division during 2008-2009.
He has been awarded with prestigious IETEâ€”K S Krishnan Memorial Award-2017 for the Best System Oriented research paper. He achieved third place in All India Mentor Graphics design contest held at Bangalore, India in 2011. He has received 2nd Runner up and Cash Prize of Rs. 50,000/- in All India Mentor Graphics Design Contest held at Bangalore.
He has several publications in Book Chapters of Springer, Journals including IEEE Transactions in Electromagnetic Compatibility, Nanotechnology, Springer, Taylor and Francis and several national and international reputed Conferences.
VLSI, Nanotechnology, Numerical Method Techniques--FDTD, Design Techniques and Modelling Schemes of High-speed on-chip VLSI Interconnects, Modeling and Simulation Schemes, Advanced Devices and Their Modeling, Analysis