Dr. Puneet Bhateja obtained his PhD in Theoretical Computer Sc from Chennai Mathematical Institute in year 2009 under the supervision of Prof Madhavan Mukund. In his doctoral thesis, he proposed a mathematical theory for testing distributed systems. Immediately after his PhD, he moved to INT-Paris (France). He worked there as a research engineer from 2009 to 2010. Subsequently he held post doctoral positions at INRIA-Rennes (France) from 2010-2011, and CRIM (Canada) from 2011-2012. He joined DA-IICT in year 2013, and since then he is working here.

Theoretical Computer Science

• Puneet Bhateja, “A theoretical framework for testing cyber-physical systems”,
  IEEE-CoDIT 2019, Paris, France
• Puneet Bhateja, “A new semantic equivalence for real-time processes”,
  ISEC 2017, Jaipur, India
• Puneet Bhateja, “Asynchronous testing of real-time systems”,
  SCSS 2017, Gammarth, Tunisia
• Puneet Bhateja, “Designing Distributed Systems w.r.t. Conformance”
  APSEC 2015, New Delhi, India
• Puneet Bhateja, “A TGV-like approach for asynchronous testing”,
  ISEC 2014, Chennai, India
• A Tagging Protocol for Asynchronous Testing
  By: Puneet Bhateja, TASE 2011, Xi’an, China
• Tagging Make Local Testing of Message-Passing Systems Feasible,
  By Puneet Bhateja and Madhavan Mukund
  SEFM 2008, Cape Town, South Africa
• Local Testing of Message Sequence Charts Is Difficult
  By Puneet Bhateja, Paul Gastin, Madhavan Mukund and
  K. Narayan Kumar, FCT 2007, Budapest, Hungary
• A Fresh Look at Testing for Asynchronous Communication
  By Puneet Bhateja, Paul Gastin, and Madhavan Mukund, ATVA 2006, Beijing, China

• Design and Analysis of Algorithms
• Models of Computation
• Specification and Verification of Systems