Conference Papers

• Mishra Mayank, Patil Hemant A. Design and implementation of HMM-VQ based isolated digit recognition systemin Proceedings of 4th Indian International Conference on Artificial Intelligence (IICAI-09), Tumkur, India, Dec. 16-18, 2009.
• Patil Hemant A., Sharma Esha, Sitaram Sunayana DA-IICT cross-lingual and multilingual corpora for speaker recognitionin Proceedings of Seventh International conference on Advances in Pattern Recognition (ICAPR 2009), Kolkata, Feb. 4-6, 2009, pp. 187-190.
• Krishnamurthy Aarthy, Lodha Nupur, Rai Nivesh, Venkataraman Hrishikesh Notice of Violation of IEEE Publication Principles: Efficient implementation of QRD-RLS algorithm using hardware-software co-design 2009 IEEE International Symposium on Parallel & Distributed Processing,
  Rome, Italy,, 23-29 May 2009, pp. 1-4.
  
• Basu T. K., Patil Hemant A. A novel modified polynomial network design for dialect recognitionin Proceedings of Seventh International conference on Advances in Pattern Recognition (ICAPR 2009), Kolkata, Feb. 4-6, 2009, pp. 175-178.
• Jain Robin, Patil Hemant A. A novel approach to identification of speakers from their humin Proceedings of Seventh International conference on Advances in Pattern Recognition (ICAPR 2009), Kolkata, Feb. 4-6, 2009, pp. 167-170.
• Gabriel Miro, Kalyampudi Poornachand, Krishnamurthy Aarthy, McManis Jennifer, Munteana, Venkataraman Hrishikesh Clustered Architecture for Adaptive Multimedia Streaming in WiMAX-based Cellular Networks Proceedings of World Congress on Engineering and Computer Science (WCECS),
  Berkeley, USA,, Oct. 22-24, 2009,, pp. 753-758.
  
• Patil Hemant A. Infant identification from their cryin Proceedings of Seventh International conference on Advances in Pattern Recognition (ICAPR 2009), Kolkata, Feb. 4-6, 2009, pp. 107-109.
• Raval Mehul S. DC-AC coefficients based multiple watermarking technique Proceedings of Annual IEEE India Conference (INDICON 2009), Gandhinagar, India, Dec. 18-20, 2009, pp. 125-128.
• Gupta Amit kumar, Parikh Chetan A CMOS comparator circuit optimized for power-delay product and input-output isolationin Proceedings of 12th IEEE VLSI design and Test Symposium (VDAT 2008), Bangalore, Jul. 23-26, 2008. pp. 10-17.
• Deepak B. Hiremath, Pasalapudi Aditya, Yalamanchili Kishore Design of optimal architectures using homogeneous routers for application specific network on chipin... Proceedings of International Conference on Emerging Trends in Engineering and Technology (ICETET 2008), Nagpur, Jul. 16-18, 2008. pp. 873-877.