Conference Papers

• Madhumita Mazumdar From improving icons to swadeshi heroes-scientists as moral exemplars in colonial Bengalin Proceedings of the 19th European Conference on Modern South Asian Studies, Netherlands, June, 2006.
• Bhavsar Arnav V, Mitra Suman K., Patel Hima M Face recognition using modular principal component analysis and support vector machinein Proceedings 3rd IET International Conference on Visual Information Engineering, (VIE2006), Sep., 2006, pp. 74-78.
• Amit Gopal M. Purohit, Sanjeev Gupta A New Linearity Enhancing Technique for 802.11 b/g Low Noise Amplifiers 49th IEEE International Midwest Symposium on Circuits and Systems, 2006 San Juan, PR, USA, 06-09 Aug. 2006, pp.651-654 10.1109/MWSCAS.2006.382147
• Banerjee Asim, Jain Shalabh, Mitra Suman K., Roy Anil K A graphical approach for fingerprint verificationin Proceedings 3rd IET International Conference on Visual Information Engineering (VIE2006), Bangalore, Sept., 2006, pp. 68-73.
• Bombale U.L., Gupta Sanjeev Design of Ultra Wideband Microstrip Antenna 2006 IEEE Antennas and Propagation Society International Symposium Albuquerque, NM, USA, 09-14 Jul. 2006, pp.3705-3708 10.1109/APS.2006.1711426
• Abbasi Teher, Bhatt Amit, Ramunajan Novel architecture of EBC for JPEG2000in Proceedings of the 19th International Conference on VLSI Design, 2006, held jointly with 5th International Conference on Embedded Systems and Design, Hyderabad, Jan. 2006.
• Bhatt Krutarth, Mitra Suman K., Roy Anil K A hybrid approach to noise resilient digital image watermarkingin Proceedings of WCVGIP 2006, Hyderabad, pp. 67-72.
• Lenin R.B., Patel Komal, Srivastava Sanjay MAC Layer aware Stable Link Routing (MACSLR) in Mobile Adhoc Networks International Symposium on Ad Hoc and Ubiquitous Computing Mangalore, India, IEEE, 20-23 Dec. 2006, pp. 19-26 10.1109/ISAHUC.2006.4290642
• A novel LO circuit for sub-harmonic mixerin Proceedings of the 10th VLSI Design & Test Symposium, Goa, Aug., 2006, pp 40-46.
• Ranjan Prabhat, Reddy N. Vinod, Saraswat Prabhat K A novel approach for instruction level power modeling of embedded systemsin Proceedings of National Conference on Embedded Systems, Feb. 25, 2006, pp.I-1 to I-5.